Intel Explores Dual-Sided Power Delivery for 14A2 Process Technology

• July 6, 2026

Intel is reportedly evaluating a new approach to power delivery in its semiconductor manufacturing process, potentially adopting power supply connections on both sides of the silicon substrate for its upcoming 14A2 technology node. This represents a notable development after the company had extensively promoted the benefits of a single-sided backside power delivery method.

New Direction in Power Delivery Architecture

For years, Intel has emphasized the transition to delivering electrical power through the backside of the silicon wafer as a significant advancement in chip fabrication. This method allows for improved power efficiency and heightens the integration density of components by freeing up space on the front side of the chip.

However, information sourced from South Korean media outlets suggests Intel might be rethinking this approach for its 14A2 node. The semiconductor giant could implement power delivery from both sides of the silicon crystal, marking a shift from previous design philosophies where power was supplied solely from the wafer’s backside.

The idea of dual-sided power delivery entails having electrical connections and pathways integrated onto both faces of the silicon die. This architecture could potentially provide enhanced power distribution capabilities, mitigate voltage drops, and improve overall chip performance. Though Intel has not publicly confirmed this strategy or shared detailed specifications, this step may contribute to addressing the increasing demands for power efficiency and density in next-generation processors.

This prospective change may also reflect Intel’s evolving technological priorities as it advances its process nodes. The 14A2 fabrication technology is anticipated to leverage new transistor architectures and manufacturing techniques to maintain competitive performance and energy efficiency.

The dual-sided approach to power delivery could help overcome physical limitations encountered with conventional single-sided power routing, particularly as transistors continue to shrink and circuits become more complex. By distributing power more evenly across the chip, thermal management and electromagnetic interference may also see potential improvements.

Intel’s exploration of this method aligns with broader industry trends where semiconductor companies continuously innovate to sustain Moore’s Law and enhance chip capabilities amid escalating design challenges.

Details regarding the implementation timeline, technical hurdles, or commercial deployment of this dual-sided power delivery remain limited at this stage. Intel has yet to provide official statements or publish technical data concerning the adoption of this method in 14A2 or future process technologies.

As the semiconductor landscape advances, Intel’s possible pivot towards dual-sided silicon power delivery demonstrates the company’s commitment to refining chip design fundamentals to meet the complex requirements of next-generation computing platforms.

Intel is considering dual-sided power delivery for its upcoming 14A2 process, a shift from previous design approaches.