JEDEC Finalizes SPHBM4 Standard to Lower Costs of High-Bandwidth Memory

• July 14, 2026

The JEDEC Solid State Technology Association, known for defining memory and storage standards, has officially ratified the SPHBM4 (Standard Package High Bandwidth Memory 4) specification. This new standard aims to provide the high data throughput of HBM4 memory while enabling greater capacity and lower integration costs.

Cost-Effective High-Performance Memory

SPHBM4 preserves the total bandwidth capabilities characteristic of the HBM4 memory standard but introduces compatibility with conventional organic substrates, commonly used in printed circuit boards. This compatibility is expected to significantly reduce manufacturing and integration expenses.

Traditional HBM memory modules utilize silicon interposers or advanced packaging solutions that can contribute to increased production complexity and expense. By contrast, the SPHBM4 approach enables memory stacks to be mounted on organic laminate substrates, which are more cost-effective and widely used in electronics assembly.

This development is poised to enhance the accessibility of high-bandwidth memory solutions for a broader range of applications, potentially accelerating innovation in sectors requiring rapid data throughput such as artificial intelligence, graphics processing, and high-performance computing.

JEDEC’s official release of document JESD330-4 formalizes the technical specifications and implementation guidelines for manufacturers and developers to adopt SPHBM4, ensuring interoperability and standard compliance across the industry.

With the ratification of SPHBM4, the memory technology landscape may see a shift toward more cost-efficient high-bandwidth memory products without compromising speed or performance. However, further details regarding market availability, pricing, or product timelines have not been disclosed.

JEDEC has approved the SPHBM4 memory standard, reducing costs without sacrificing speed through compatibility with organic substrates.