European Researchers Demonstrate Server-Grade RISC-V CPU Using Intel 3 Process Technology

• February 16, 2026

In a significant development for European technology autonomy, researchers at the Barcelona Supercomputing Center (BSC-CNS) have confirmed the operational success of their newly designed server-grade processor based on the RISC-V architecture. This chip, referred to as the TC1, showcases Europe’s capability to engineer critical infrastructure components independently while leveraging advanced semiconductor manufacturing processes.

Advancing European Semiconductor Sovereignty with RISC-V and Intel 3

The TC1 processor, tailored for server applications, is fabricated using Intel’s cutting-edge Intel 3 process node. This marks a notable achievement for the European tech ecosystem, highlighting collaboration between processor architecture innovation and state-of-the-art fabrication technology. Utilizing an open instruction set architecture (ISA) like RISC-V aligns with strategic goals to reduce import reliance and enhance supply chain security for critical computing hardware within Europe.

The Barcelona Supercomputing Center, known for its leadership in supercomputing and advanced computing research, spearheaded the design and validation efforts of the TC1. Confirmation of the processor’s functional integrity validates both the design methodology and manufacturing approach, reinforcing confidence in Europe’s ability to develop competitive server CPUs tailored to regional needs.

This demonstration is more than a technological milestone; it represents progress in achieving greater self-sufficiency in essential digital infrastructure. The success of the TC1 underscores potential shifts in how server processors can be sourced, designed, and produced within Europe, potentially encouraging further innovation in RISC-V architectures supported by local or collaborative manufacturing ventures with semiconductor foundries operating leading-edge nodes.

While detailed performance metrics and commercial plans for the TC1 have not been disclosed, the project illustrates the feasibility of combining open ISA designs with top-tier fabrication technologies. This route offers flexible innovation opportunities and strategic benefits, enabling customization and optimization specific to European market and security requirements.

As global technology landscapes evolve, developments such as the TC1 provide a blueprint for regional ecosystems looking to secure critical technology independence. The embrace of RISC-V architecture built on the Intel 3 process signals a forward path for Europe in the competitive semiconductor arena, balancing open innovation with advanced manufacturing capabilities.

Barcelona Supercomputing Center verifies functionality of European-designed RISC-V server CPU fabricated with Intel 3 process technology.